In recent years, multilayer ceramic substrates in which wire conductors are three dimensionally disposed have been widely used for modules in which a plurality of electric components, such as semiconductor components, are disposed.
Patent Document 1 discloses a multilayer ceramic substrate having a multilayer structure including an internal layer portion and surface layer portions positioned so as to sandwich the internal layer portion in a laminating direction. In the multilayer ceramic substrate, needle-like crystals are deposited in the internal layer portion, and when the thermal expansion coefficient of the surface layer portions is denoted by α1 (ppmK−1) and the thermal expansion coefficient of the internal layer portion is denoted by α2 (ppmK−1), 0.3≤α2−α1≤1.5. Patent Document 2 discloses a multilayer ceramic substrate having a multilayer structure including surface layer portions and an internal layer portion. In the multilayer ceramic substance, the thermal expansion coefficient of the surface layer portion is lower than the thermal expansion coefficient of the internal layer portion, and the difference in thermal expansion coefficient is 1.0 ppmK−1 or more. The weight percentage of a component common to the material forming the surface layer portions and the material forming the internal layer portion is 75 weight % or more.
According to multilayer ceramic substrates described in Patent Documents 1 and 2, setting the thermal expansion coefficient of the surface layer portions lower than the thermal expansion coefficient of the internal layer portion causes compressive stress on outermost layers on the front and back sides during a cooling process after firing. Thus, it is assumed that the flexural strength of the multilayer ceramic substrate is improved.
Patent Document 1: Japanese Unexamined Patent Application Publication No. 2007-73728
Patent Document 2: International Publication No. 2007/142112